Computer information technology continues to spread epidemically throughout our technological society. Moreover, the proliferation of such technology fuels a persistent demand for smaller and higher density storage devices. At present, computer technologies pervade many aspects of modern life in the form of portable devices such as PDA's, phones, pagers, digital cameras and voice recorders, MP3 players, and laptop computers to name but a few. Furthermore, behind the scenes, business and industry rely heavily on computers to reduce cost and produce products more efficiently. The fervent societal desire for omnipresent computing technologies ensures that the movement toward developing small, fast, low power, inexpensive, and high-density memory will continue into the distant future. To achieve such high densities, there has been and continues to be efforts in the semiconductor industry toward scaling down device dimensions (e.g., at sub-micron levels) on semiconductor wafers. In order to accomplish such high device packing density, smaller and smaller feature sizes are required. Devices fabricated with sub-micron feature sizes, however, have an increased likelihood of containing errors or contaminated data.
Popular volatile memory technologies such as dynamic random access memory (DRAM) and synchronous random access memory (SRAM) are known to be susceptible to both hard errors and soft errors. These small geometry or high density memory cells are also more susceptible to data corruption from a variety of sources. Hard errors or faults occur when there is a physical failure in the digital circuitry, for example, due to a problem in the design or manufacturing of a device or due to physical deterioration. Memory devices with hard errors experience consistently incorrect results (e.g., bit always 1 or 0). Soft errors or transient faults occur when charged particles such as alpha particles or cosmic rays penetrate a memory cell and cause a bit(s) to flip or change states. Memory disruptions caused by soft errors are quantified as a soft error rate (SER). Soft errors are somewhat random events, however the SER can vary exponentially according to, among other things, the proximity of a device to a radioactive source and the altitude at which the device operates.
No matter what the type or cause, memory faults are generally unacceptable. In certain situations, a memory error that causes a bit to change states will be almost insignificant. For instance, if one bit in a single screen shot that appears for a spit second is off (rather than on) such an error will often go unnoticed. However, if a single bit is flipped in a router application it may mean the difference between a message going to Boston and a message going to San Francisco. Furthermore, small errors in military and mission critical systems could cause catastrophic damage to life and property.
To compensate for errors and improve the reliability of memory devices even as feature sizes decrease, a multitude of error detection and correction techniques need to be employed. However, utilizing conventional error detection and correction techniques can significantly impact system performance in part because the central processor in a computer system needs to be diverted from other processes to test and correct a memory device. Furthermore, the period of time that the processor is diverted from other processes varies proportionally with the amount of memory utilized on a platform. This is problematic, as more and more software applications require an increasingly large amount of RAM to store and execute programs. Moreover, conventional systems only test the memory upon start-up, prior to booting a machine, thus delaying system startup in proportion with the amount of system RAM and ignoring errors the may arise during system operation. Therefore, there is a need for a system and method of testing, correcting, and compensating for errors that does not significantly delay machine startup and which can continuously test for and correct errors while a system is operating.